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HW/SW co-design platform for image and video processing applications on Virtex-5 FPGA using PICO

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5 Author(s)
C. Desmouliers ; Department of Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, Illinois 60616 USA ; S. Aslan ; E. Oruklu ; J. Saniie
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The objective of this work is to design and implement an Image and Video Processing Platform (IVPP) on FGPAs using PICO based HLS. This hardware/software codesign platform has been implemented on a Xilinx Virtex-5 FPGA. The video interface blocks are done in RTL and the initialization phase is done using a MicroBlaze processor allowing the support of multiple video resolutions. This paper discusses the architectural building blocks showing the flexibility of the proposed platform. This flexibility is achieved by using a new design flow based on PICO. IVPP allows custom-processing blocks to be plugged-in to the platform architecture without modifying the front-end (capturing video data) and back-end (displaying processed output). This paper presents several examples of video processing applications, such as a Canny edge detector, motion detector and object tracking that have been realized using IVPP for real-time video processing.

Published in:

Electro/Information Technology (EIT), 2010 IEEE International Conference on

Date of Conference:

20-22 May 2010