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A Low-Power Wide-Range Clock Synchronizer With Predictive-Delay-Adjustment Scheme for Continuous Voltage Scaling in DVFS

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6 Author(s)
Onouchi, M. ; Central Res. Lab., Hitachi Ltd., Tokyo, Japan ; Kanno, Y. ; Saen, M. ; Komatsu, S.
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Abstract-A wide-range voltage-and-frequency clock synchronizer (WRCS) for maintaining synchronization during dynamic voltage-and-frequency scaling was developed. The key feature of the WRCS is short-range skew measurement based on a predictive-delay-adjustment (PDA) scheme. The short-range skew measurement results in reduction of the area of the WRCS by 77%, that is, the area of the fabricated WRCS in a 40-nm CMOS process is only 5.65 × 10-3 mm2. In the case of large voltage variation (0.8-1.55 V) and wide frequency range (100 MHz-1 GHz), measured skew is suppressed to the lowest percentage yet reported, namely, less than 6.8% of clock period. Moreover, current consumption of the WRCS is only 0.48 mA under 1.1-V 100-MHz operation.

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Solid-State Circuits, IEEE Journal of  (Volume:45 ,  Issue: 11 )