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In this paper a very low voltage low power CMOS Low Noise Amplifier (LNA) suitable for ultra low power applications is presented. A new design methodology for noise and power consumption optimization is described. By using forward body bias (FBB), the proposed LNA, implemented in a 0.13μm CMOS process, can operate at 0.5V supply voltage, at 2.4GHz. Post layout simulation results show that it achieves 9.6dB power gain, 2.55dB noise figure (NF), and -6.2dBm input third order intercept point (IIP3), while drawing 0.88mA bias current.