In the past decades, many algorithms with the goal of achieving energy efficiency have been proposed for scheduling real-time tasks. Due to a lack of a unified testing framework, most of them were evaluated via simulations under their own experimental scenarios. However, finding their performance in real processors is essential if these algorithms are to be used in practice. In this paper, we design a unified framework to evaluate power-aware scheduling algorithms based on a real Intel PXA255 XScale processor, and present a case study to compare several key algorithms using DVS/Shut-Down. The energy efficiency and the quantitative difference in their performance as well as the practical issues found in the implementation of these algorithms are discussed. Our experiments show a gap between the theoretical results and the real results. Our framework not only gives researchers a tool to evaluate their system designs, but also helps them to bridge this gap in their future works.
Published in:
Low-Power Electronics and Design (ISLPED), 2010 ACM/IEEE International Symposium on
Date of Conference: 18-20 Aug. 2010