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Impact of Highly Compressive Interlayer-Dielectric-  \hbox {SiN}_{x} Stressing Layer on \hbox {1}/f Noise and Reliability of SiGe-Channel pMOSFETs

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5 Author(s)
Yu-Ting Chen ; Inst. of Electron. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan ; Kun-Ming Chen ; Wen-Shiang Liao ; Guo-Wei Huang
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The 1/f noise and reliability of SiGe-channel pMOSFETs with a highly compressive contact-etching stop-layer (CESL) interlayer-dielectric-SiNx, stressing layer have been studied in this letter. The SiGe-channel devices with a highly compressive CESL layer have higher drain current and lower 1/f noise than the conventional SiGe-channel and bulk-Si devices. However, the device reliability is degraded while integrating with the highly compressive CESL layer. By examining the effective oxide-trap densities under hot-carrier instability stress, we find that the incorporated hydrogen in gate oxide during CESL layer deposition may play an important role on the 1/f noise and device reliability.

Published in:

Electron Device Letters, IEEE  (Volume:31 ,  Issue: 12 )

Date of Publication:

Dec. 2010

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