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Fabrication of Sub-100-nm silicon nanowire devices on SOI wafer by CMOS compatible fabrication process

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4 Author(s)
Sun, L.N. ; Nat. Key Lab. of Sci. & Technol. on Micro/Nano Fabrication, Peking Univ., Beijing, China ; Lee, T.M.H. ; Yang, Z.C. ; Yan, G.Z.

A technique for the fabrication of planar silicon nanowires (SiNWs) on SIMOX-SOI (Separation by Implanted Oxygen-Silicon on Insulator) wafers using sidewall transfer lithography is presented, which can be used as field effect devices for biomolecular detections. Different from the existing synthesis process, this method is based on standard “top-down” semiconductor process. Aluminum sidewall is applied in this work on account of its high etching selectivity over both silicon and oxide, so as to preserve the thin oxide layer of SIMOX-SOI for reliable electrical isolation which is considered crucial to the weak signal detection. Silicon nanowires with the dimensions of 50 nm × 90 nm × 5 μm have been successfully demonstrated by this CMOS compatible fabrication process.

Published in:

Nano/Micro Engineered and Molecular Systems (NEMS), 2010 5th IEEE International Conference on

Date of Conference:

20-23 Jan. 2010