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Design of a parallel photonic FFT processor

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3 Author(s)
Rozier, R.G. ; North Carolina Univ., Charlotte, NC, USA ; Kiamilev, F.E. ; Krishnamoorthy, A.V.

We present the design of a parallel high-performance chipset for computing 1-D complex fast Fourier transforms (FFTs). The chipset is composed of two chips-a photonic FFT processing engine (PFFT) and a photonic data storage element (PRAM). Using this chipset, a number of high-speed systems can be created. The chipset is compatible with a number of available interconnect technologies, such as free-space optical interconnection schemes involving the flip-chip integration of submicron CMOS ICs with GaAs chips containing 2-D arrays of multiple quantum well diode optical receivers and transmitters

Published in:

Massively Parallel Processing Using Optical Interconnections, 1996., Proceedings of the Third International Conference on

Date of Conference:

27-29 Oct 1996