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Impact of Metal Gate Granularity on Threshold Voltage Variability: A Full-Scale Three-Dimensional Statistical Simulation Study

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4 Author(s)
Andrew R. Brown ; School of Engineering, University of Glasgow, Glasgow, U.K. ; Niza M. Idris ; Jeremy R. Watling ; Asen Asenov

It has recently become clear that the use of high-κ /metal gate stacks will have a distinct impact on the intrinsic parameter variability of the corresponding CMOS devices. The metal gates have a natural granularity, with the work function of each grain depending on its orientation. Here, we present a full-scale 3-D statistical simulation study of the statistical variability induced by this metal gate granularity (MGG). We investigate the effect of grain size on both the magnitude of the variability and the shape of the corresponding statistical distribution. The distributions in threshold voltage due to MGG are analyzed in isolation and in combination with random discrete dopants and line-edge roughness.

Published in:

IEEE Electron Device Letters  (Volume:31 ,  Issue: 11 )