By Topic

Ferroelectric (Fe)-NAND Flash Memory With Batch Write Algorithm and Smart Data Store to the Nonvolatile Page Buffer for Data Center Application High-Speed and Highly Reliable Enterprise Solid-State Drives

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

8 Author(s)
Teruyoshi Hatanaka ; Department of Electrical Engineering and Information Systems, Graduate School of Engineering, University of Tokyo, Tokyo, Japan ; Ryoji Yajima ; Takeshi Horiuchi ; Shouyu Wang
more authors

A ferroelectric (Fe)-NAND flash memory with a batch write algorithm and a smart data store to the nonvolatile page buffer is proposed. An enterprise solid-state drive (SSD) for a data center is a future promising market of NAND flash memories. The critical problem for such an enterprise SSD is a slow random write. The write unit in a NAND flash memory is a page, 4-8 KBytes. Because the minimum write unit of the operating system is a sector, 512 Bytes, a random write to write a smaller data than a page size frequently happens, which creates a garbage. As a garbage accumulates, a garbage collection is performed to increase a workable memory capacity. The garbage collection takes as much as 100 ms, which is 100 times longer than a page program time, 800 μs, and thus causes a serious performance degradation. In the proposed Fe-NAND flash memory, the data fragmentation in a random write is removed by introducing a batch write algorithm where a page buffer in the Fe-NAND flash memory temporarily stores a program data. The memory cell program starts after the program data as much as the page size accumulates in page buffers. As the data fragmentation is eliminated, the SSD performance can double. In addition, the nonvolatile page buffer realizes a power-outage-immune highly reliable operation. With a low program/erase voltage of 6 V and a high endurance of 100 million cycles, the proposed Fe-NAND flash memory is most suitable for a highly reliable highspeed low-power data-center-application enterprise SSD.

Published in:

IEEE Journal of Solid-State Circuits  (Volume:45 ,  Issue: 10 )