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SARC Coherence: Scaling Directory Cache Coherence in Performance and Power

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2 Author(s)
Kaxiras, S. ; Inf. Technol. Dept., Uppsala Univ., Uppsala, Sweden ; Keramidas, G.

The SARC project seeks to improve power scalability of shared-memory chip multiprocessors (CMPs) by making directory coherence more efficient in both power and performance. The authors describe how they eliminate two major sources of inefficiency for directory coherence protocols: invalidation traffic on writes and directory indirection for finding the writer.

Published in:

Micro, IEEE  (Volume:30 ,  Issue: 5 )