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A novel Dual-Mode synchronous high efficiency buck converter with Adaptive deadtime control

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4 Author(s)
Ya-Wu Chung ; Dept. of Electr. Eng., Nat. Taiwan Ocean Univ., Keelung, Taiwan ; Mahendra, S.R. ; Wan-Rone Liou ; Chih-Yung Cheng

A novel Dual-Mode Modulation Zero Current Detection (ZCD) & Adaptive deadtime architecture has been proposed in this paper that can be used in a DC to DC step-down switching regulator. The converter operates in the pulse width modulation (PWM) mode for heavy load conditions and in the pulse frequency modulation (PFM) mode for light load conditions. In both these operating modes, the converter shows very high power conversion efficiency. This structure also has an adaptive deadtime range mechanism that changes the deadtime depending on the load current. This helps in reducing the power consumption considerably. The architecture also provides better heavy load current conversion efficiency as compared to the other works in the literature. Also, it can help in avoiding the malfunctioning of the ZCD mechanism that happens in the PFM mode for low currents. The most important contribution of this work is that it can achieve a high efficiency above 94% and shows an increasing trend in the efficiency even at heavy load conditions. Also the other major contribution of the proposed design is that it can in general be applied not only to a buck regulator but also to a boost regulator and a buck-boost regulator. A high conversion efficiency of 95.8% has been achieved in this work at a load current of 150 mA. And for the load current operation range of 50 mA to 420 mA, the conversion efficiency reaches above 94%. This design uses the TSMC 0.35-μm 2P4M 5V polycide CMOS process. The input operating voltage range for this process is from 3 to 5 V.

Published in:

Communications, Circuits and Systems (ICCCAS), 2010 International Conference on

Date of Conference:

28-30 July 2010