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A new concept for accurate modeling of VLSI interconnections and its application for timing simulation

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3 Author(s)
Wunder, B. ; Inst. fur Tech. der Inf., Karlsruhe Univ., Germany ; Lehmann, G. ; Muller-Glaser, K.D.

This paper presents a new concept for accurately modeling the timing behavior of VLSI interconnections using frequency domain methods and taking into consideration distributed parasitics as well as lumped elements and contact holes. A piecewise linear signal representation is used to catch the waveform dependencies of submicron structures. The models are applied in an analysis tool for clock trees and in a concept for accurate post-layout timing simulation

Published in:

Design Automation Conference, 1996, with EURO-VHDL '96 and Exhibition, Proceedings EURO-DAC '96, European

Date of Conference:

16-20 Sep 1996