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Preliminary insights on shared memory PIC code performance on the Convex Exemplar SPP1000

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4 Author(s)
MacNeice, P. ; Hughes STX, NASA Goddard Space Flight Center, Greenbelt, MD, USA ; Mobarry, C.M. ; Crawford, J. ; Sterling, T.L.

We implement a 3D Electrostatic Particle in Cell (PIC) code on the HP-Convex Exemplar SPP1000. Our principal goals are to identify the best PIC algorithm for this architecture and capture its performance, and to explore whether the architecture and system software achieve an efficient and scalable shared memory programming environment. We show that PIC codes can achieve good performance on the Exemplar. However to achieve this performance great care is required in minimizing long latencies to remote memory and in maximizing cache reuse. Combined, these two requirements for avoiding performance degradation due to latency resulted in a complex programming task and diminished significantly many advantages that the shared memory hardware provided towards ease-of-use. Our best performing code avoided stressing the cache coherency hardware. Best performance was achieved by storing the particle data in 'processor local' memory blocks, and by intermittent sorting of the particle data to improve processor cache reuse.

Published in:

Frontiers of Massively Parallel Computing, 1996. Proceedings Frontiers '96., Sixth Symposium on the

Date of Conference:

27-31 Oct. 1996

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