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ASIC Design of an Adaptive Control Unit for Reconfigurable Analog-to-Digital Converters

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3 Author(s)
Razak, Z. ; Syst. Level Integration Group, Univ. of Edinburgh, Edinburgh, UK ; Erdogan, A. ; Arslan, T.

There is a need to use a truly adaptive analog-to-digital converter (ADC) to respond to any signal change and reduce the power consumption with less implementation complexity. The paper presents a front-end ASIC implementation for an adaptive control unit (ACU) for a reconfigurable ADC. The control unit is based on an adaptive algorithm that changes either the converter resolution or sampling-rate within an observation interval. Switching activity on the digital ADC output is monitored, evaluated and compared to threshold values. The resolution (or sampling-rate) is increased when the switching activity is high and decreased when the activity is low. Since the adaptive control unit is simple, it is suitable for most Nyquist-rate ADCs especially for area-limited portable devices. The module is synthesized using AMS 0.35μm/3.3V CMOS standard libraries. In adaptive resolution ADC application, the ACU occupies only 677 equivalent 2-input NAND gates and consumes only 1.01mW. Meanwhile, for adaptive sampling-rate ADC, the gate density is 703 and power consumption is 2.22mW. The results show that the area complexity of the ACU is small and consumes minimum power. For this reason, the ACU is suitable for adaptive ADC implementation targeting low power wireless applications.

Published in:

VLSI (ISVLSI), 2010 IEEE Computer Society Annual Symposium on

Date of Conference:

5-7 July 2010