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A unique methodology for at-speed test of cDSPTM and ASIC devices

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2 Author(s)
D. Potts ; Texas Instrum. Inc., Stafford, TX, USA ; R. Griesmer

This paper presents a new design to test methodology used to create at-speed system tests for complex integrated circuits. The unique approach discussed in this paper has been termed TADJUST, for Timing ADJUSTment, and offers a solution which enables the creation of robust at speed functional tests. The Tadjust approach provides a method for improving at-speed testability by using multiple dynamic timing references in the design to test flow. The at-speed testability problems, Tadjust concept, and supporting results from a cDSP(TM) design are discussed

Published in:

Test Conference, 1996. Proceedings., International

Date of Conference:

20-25 Oct 1996