Referenced Items are not available for this document.
This paper presents a new design to test methodology used to create at-speed system tests for complex integrated circuits. The unique approach discussed in this paper has been termed TADJUST, for Timing ADJUSTment, and offers a solution which enables the creation of robust at speed functional tests. The Tadjust approach provides a method for improving at-speed testability by using multiple dynamic timing references in the design to test flow. The at-speed testability problems, Tadjust concept, and supporting results from a cDSP(TM) design are discussed
Published in:
Test Conference, 1996. Proceedings., International
Date of Conference: 20-25 Oct 1996
- Page(s):
- 701 - 707
- Meeting Date :
- 20 Oct 1996-25 Oct 1996
- ISSN :
- 1089-3539
- Print ISBN:
- 0-7803-3541-4
- INSPEC Accession Number:
- 5533497
- Conference Location :
- Washington, DC
- Digital Object Identifier :
- 10.1109/TEST.1996.557128
- Product Type:
- Conference Publications
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