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A High-Yield Process for 3-D Large-Scale Integrated Microfluidic Networks in PDMS

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5 Author(s)
Carl Fredrik Carlborg ; Microsystem Technology Laboratory, School of Electrical Engineering, Royal Institute of Technology (KTH), Stockholm, Sweden ; Tommy Haraldsson ; Matteo Cornaglia ; Göran Stemme
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This paper presents an uncomplicated high-yield fabrication process for creating large-scale integrated (LSI) 3-D microfluidic networks in poly(dimethylsiloxane) (PDMS). The key innovation lays in the robust definition of miniaturized out-of-plane fluidic interconnecting channels (=vias) between stacked layers of microfluidic channels in standard PDMS. Unblocked vias are essential for creating 3-D microfluidic networks. Previous methods either suffered from limited yield in achieving unblocked vias due to residual membranes obstructing the vias after polymerization, or required complicated and/or manual procedures to remove the blocking membranes. In contrast, our method prevents the formation of residual membranes by inhibiting the PDMS polymerization on top of the mold features that define the vias. In addition to providing unblocked vias, the inhibition process also leaves a partially cured, sticky flat-top surface that adheres well to other surfaces and that allows self-sealing stacking of several PDMS layers. We demonstrate the new method by manufacturing a densely perforated PDMS membrane and an LSI 3-D PDMS microfluidic channel network. We also characterize the inhibition mechanism and study the critical process parameters. We demonstrate that the method is suitable for structuring PDMS layers with a thickness down to 10 m.

Published in:

Journal of Microelectromechanical Systems  (Volume:19 ,  Issue: 5 )