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ATPD: an automatic test pattern generator for path delay faults

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2 Author(s)
D. Karayiannis ; Dept. of Comput. Sci., Southern Illinois Univ., Carbondale, IL, USA ; S. Tragoudas

In this paper we present an efficient test pattern generator for robust path delay faults, which we call ATPD. Our CAD tool detects much faster more robust path delay faults than any other existing nonenumerative approach. ATPD generates patterns for a non necessarily polynomial number of path delay faults. The nature of the problem indicates that for a test generator to be efficient it must count nonenumeratively the additional delay paths detected by each generated pair of patterns. ATPD generates each pair of patterns and determines the number of paths covered in a novel way that combines these two phases effectively

Published in:

Test Conference, 1996. Proceedings., International

Date of Conference:

20-25 Oct 1996