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Upset hardened memory design for submicron CMOS technology

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3 Author(s)
T. Calin ; TIMA/INPG Lab., Grenoble, France ; M. Nicolaidis ; R. Velazco

A novel design technique is proposed for storage elements which are insensitive to radiation-induced single-event upsets. This technique is suitable for implementation in high density ASICs and static RAMs using submicron CMOS technology

Published in:

IEEE Transactions on Nuclear Science  (Volume:43 ,  Issue: 6 )