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Constructing Short-Length Irregular LDPC Codes with Low Error Floor

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3 Author(s)
Xia Zheng ; Dept. of Electron. & Inf. Eng., Hong Kong Polytech. Univ., Hong Kong, China ; Lau, F.C.M. ; Tse, C.K.

Trapping sets (TSs) are known to cause error floors in regular and irregular low-density parity-check (LDPC) codes. By avoiding major error-contributing TSs during the code construction process, codes with low error floors can effectively be built. In it has been shown that TSs labeled as [w;u] are considered as being equivalent under the automorphism of the graph and are therefore contributing equally to the error floor. However, TSs with the same label [w;u] are not identical in general, particularly for the case of irregular LDPC codes. In this paper, we introduce a parameter e that can identify the number of "distinguishable" cycles in the connected subgraph induced by an elementary trapping set. Further, we propose a code construction algorithm, namely the Progressive-Edge-Growth Approximate-minimum-Cycle-Set-Extrinsic-message-degree (PEG-ACSE) method, that aims to avoid small elementary trapping sets (ETSs), particularly detrimental ETSs. We also develop theorems evaluating the minimum possible ETSs formed by PEG construction algorithms in general. We compare the characteristics of the codes built using the proposed method and those built using PEG-only or PEG-Approximate-minimum-Cycle-Extrinsic-message-degree (PEG-ACE) methods. Results from simulations show that the codes constructed using the proposed PEG-ACSE method produce lower error rates, particularly at the high signal-to-noise (SNR) region, compared with codes constructed using other PEG-based algorithms.

Published in:

Communications, IEEE Transactions on  (Volume:58 ,  Issue: 10 )

Date of Publication:

October 2010

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