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An ultra high-speed 8-bits analog-to-digital converter design

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7 Author(s)
Jinshan Yu ; Nat. Labs. of Analog Integrated Circuits, SISC, Chongqing, China ; Ruitao Zhang ; Zhengping Zhang ; Yonglu Wang
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In this paper, an ultra high-speed 8-bits analog-to-digital converter with digital foreground calibration in 0.18-μm CMOS technology is presented. The spice simulation and the measured results show the folding and interpolating ADC produces 5.9 ENOB with calibration disabled and 7.2 ENOB with calibration Enabled at Nyquist.

Published in:

Intelligent Control and Information Processing (ICICIP), 2010 International Conference on

Date of Conference:

13-15 Aug. 2010