FPGA implementation of one-unit fixed-point ICA-R algorithm

Independent component analysis with reference (ICA-R) can extract some desired source signals by utilizing rough information about the sources as reference signals, and thus achieve much improved performance compared to standard ICA utilizing no prior information. To facilitate real applications of ICA-R, this paper presents hardware implementation of a one-unit fixed-point ICA-R algorithm which extracts desired sources one by one. The algorithm is divided into five modules including input module, unmixing module, weight vector updating module, judgment module, and output module. Specifically, the nonlinear function in the weight vector updating module is designed based on piecewise linear approximation. The one-unit fixed-point ICA-R algorithm is implemented on Xilinx FPGA Virtex-II Pro XC2VP30 using System Generator for DSP, Simulink, and Xilinx ISE. The experiment results with speech signals show the efficacy of the FPGA implementation.