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A noise-shaped synchronous buck converter using a 3rd-order continuous-time (CT) active-passive sigma-delta modulator (SDM) is presented. Detailed system modeling and loop design methodology for the SDM based DC-DC are discussed. The proposed circuit has been designed with Chartered 0.35 μm CMOS process. The system operates with a clock of 8 MHz. Compared with the traditional PWM mode converter, simulation results show that the proposed converter suppresses the switching tones by more than 25 dB over a wide frequency range with a peak efficiency of 96%.