By Topic

Polished TFT's: surface roughness reduction and its correlation to device performance improvement

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Chan, A.B.Y. ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, Hong Kong ; Nguyen, C.T. ; Ko, P.K. ; Chan, S.T.H.
more authors

Chemical-mechanical polishing (CMP) has been applied to the fabrication of n-channel polysilicon thin film transistors (poly-Si TFT's). Three different polishing conditions are compared: (1) polishing before; (2) polishing after; and (3) both polishing before and after the a-Si recrystallization. Devices with no polishing act as control samples. Experiments consistently reveal that devices with post-anneal polishing exhibit the best performance, Two-fold improvement of drain current is attributed to the smoother active polysilicon surface. The electrical characteristics of a post-anneal polished TFT in terms of field effect mobility μFE, threshold voltage VT, and subthreshold swing S can be further improved if hydrogenation is employed. It is also found that a large decrease in the poly-Si surface roughness leads to higher dielectric breakdown strength and improved short-channel effects. Atomic force microscopy (AFM) and transmission electron microscopy (TEM) results are presented and correlated with electrical results

Published in:

Electron Devices, IEEE Transactions on  (Volume:44 ,  Issue: 3 )