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Polished TFT's: surface roughness reduction and its correlation to device performance improvement

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5 Author(s)
A. B. Y. Chan ; Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, Hong Kong ; C. T. Nguyen ; P. K. Ko ; S. T. H. Chan
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Chemical-mechanical polishing (CMP) has been applied to the fabrication of n-channel polysilicon thin film transistors (poly-Si TFT's). Three different polishing conditions are compared: (1) polishing before; (2) polishing after; and (3) both polishing before and after the a-Si recrystallization. Devices with no polishing act as control samples. Experiments consistently reveal that devices with post-anneal polishing exhibit the best performance, Two-fold improvement of drain current is attributed to the smoother active polysilicon surface. The electrical characteristics of a post-anneal polished TFT in terms of field effect mobility μFE, threshold voltage VT, and subthreshold swing S can be further improved if hydrogenation is employed. It is also found that a large decrease in the poly-Si surface roughness leads to higher dielectric breakdown strength and improved short-channel effects. Atomic force microscopy (AFM) and transmission electron microscopy (TEM) results are presented and correlated with electrical results

Published in:

IEEE Transactions on Electron Devices  (Volume:44 ,  Issue: 3 )