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Dynamic threshold-voltage MOSFET (DTMOS) for ultra-low voltage VLSI

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6 Author(s)
Assaderaghi, F. ; IBM Corp., East Fishkill, NY, USA ; Sinitsky, D. ; Parke, S.A. ; Bokor, J.
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In this paper, we propose a novel operation of a MOSFET that is suitable for ultra-low voltage (0.6 V and below) VLSI circuits. Experimental demonstration was carried out in a Silicon-On-Insulator (SOI) technology. In this device, the threshold voltage of the device is a function of its gate voltage, i.e., as the gate voltage increases the threshold voltage (Vt) drops resulting in a much higher current drive than standard MOSFET for low-power supply voltages. On the other hand, Vt is high at Vgs=0, therefore the leakage current is low. We provide extensive experimental results and two-dimensional (2-D) device and mixed-mode simulations to analyze this device and compare its performance with a standard MOSFET. These results verify excellent inverter dc characteristics down to Vdd=0.2 V, and good ring oscillator performance down to 0.3 V for Dynamic Threshold-Voltage MOSFET (DTMOS)

Published in:

Electron Devices, IEEE Transactions on  (Volume:44 ,  Issue: 3 )

Date of Publication:

Mar 1997

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