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A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique

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2 Author(s)
Pui Ying Or ; Department of Electronic Engineering, The Chinese University of Hong Kong, Shatin, Hong Kong ; Ka Nang Leung

A low-voltage fast-transient low dropout (LDO) regulator compensated by an off-chip, low-equivalent-series-resistance (ESR), nanorange output capacitor is reported in this brief. The proposed load-tracking impedance adjustment and the loop-gain boosting technique make the proposed LDO regulator have fast response and small voltage spikes. The circuit is implemented by a commercial 0.35- μm CMOS technology. The chip area is 0.032 mm2. The supply voltage ranges from 1.5 to 3 V. The regulated voltage is 1.2 V to provide 0-100 mA. The quiescent current in the no-load condition is 26 μA. A 100-nF low-ESR capacitor is sufficient to stabilize the proposed LDO regulator. The measured voltage spike is 44.9 mV only, and the response time is less than 0.2 μs.

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IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:57 ,  Issue: 10 )