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Bypassing omega network for high speed packet switching

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2 Author(s)
Lee, H.C. ; Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul ; Kyung, C.M.

A highly regular switching network consisting of several switching stages for output buffering is proposed. Each switching element performs 3×3 switching and has a tail-spared buffer for each input port. According to the performance evaluation of the proposed switching network based on computer simulation, a packet loss ratio of 10-8 was obtained for a 1024×1024 switching network consisting of 15 stages with the Bernoulli traffic source when the size of tail-spared buffer is 8 and the input traffic load is 0.9

Published in:

Electronics Letters  (Volume:32 ,  Issue: 25 )

Date of Publication:

5 Dec 1996

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