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Nanofloating Gate Memory Devices Based on Controlled Metallic Nanoparticle-Embedded InGaZnO TFTs

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3 Author(s)
Young-Su Park ; Sch. of Adv. Mater. Eng., Kookmin Univ., Seoul, South Korea ; Lee, Sang Yeol ; Jang-Sik Lee

In this letter, InGaZnO thin-film transistor (bottom-gate (n+ Si) and top-contact structure)-based nanofloating gate memory devices were developed. These nonvolatile transistor memory devices contained self-assembled gold nanoparticles (AuNP) and exhibited good programmable memory characteristics according to the programming/erasing operations with large memory windows. The charge trapping in the AuNP charge storage layers was responsible for the memory operations. The good endurance and data retention capability demonstrated by these memory devices make them suitable for nonvolatile memory applications. As this approach was based on the solution-processed controlled AuNP charge trapping layers and the low-temperature synthesized transparent oxide semiconductors, it has the potential for application in low-temperature-processed transparent nonvolatile memory devices.

Published in:

Electron Device Letters, IEEE  (Volume:31 ,  Issue: 10 )