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Reduction of shorts between word lines on charge-trapping flash cell in a self-aligned double patterning technology

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6 Author(s)
Hong-Ji Lee ; Technol. Dev. Center, Macronix Int. Co., Ltd., Hsinchu, Taiwan ; Kuo-Liang Wei ; Nan-Tzu Lian ; Tahone Yang
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This paper presents a unique gate structure for reducing shorts between word lines on charge-trapping flash cell memory. In the early stage of developing sub-45 nm half-pitch word line by a self-aligned double patterning (SADP) technology, the cell array suffered from abnormal intrinsic word line-to-word line shorts, ca. 96.3% of the bridge rate on the 72 Mb cell memory, due to the formation of polysilicon residues called stringers. The increase of polysilicon over-etching to eliminate stringers involves a trade-off between the removal efficiency of stringers and the feature size maintenance. Hence, a novel bottle-shaped gate profile was tailor-made and studied. As a result, the bridge rates are dramatically suppressed to 0%~10% on the low-density flash cells and ca. 22% in average on the high-density 512 Mb flash cell memory. The novel bottle-shaped gate structure is successfully implemented in advanced charge-trapping flash memory development.

Published in:

Advanced Semiconductor Manufacturing Conference (ASMC), 2010 IEEE/SEMI

Date of Conference:

11-13 July 2010