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The response of SOI transistors under heavy ion irradiation is analyzed using Geant4 and Synopsys Sentaurus device simulations. The ion mass and energy have a significant impact on the radial ionization profile of the ion deposited charge. For example, for an identical LET, the higher the ion energy per nucleon, the wider the radial ionization track. For a 70-nm SOI technology, the track radius of high energy ions (> 10 MeV/a) is larger than the transistor sensitive volume; part of the ion charge recombines in the highly doped source or drain regions and does not participate to the transistor electric response. At lower energy (<; 10 MeV/a), as often used for ground testing, the track radius is smaller than the transistor sensitive volume, and the entire charge is used for the transistor response. The collected charge is then higher, corresponding to a worst-case response of the transistor. Implications for the hardness assurance of highly-scaled generations are discussed.