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Non-TMR SEU-Hardening Techniques for SiGe HBT Shift Registers and Clock Buffers

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12 Author(s)
Wilcox, E.P. ; Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA ; Phillips, S.D. ; Cressler, J.D. ; Marshall, P.W.
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We report new results from both broad-beam, heavy-ion and proton experiments for circuit-level RHBD techniques in SiGe digital logic. Redundant circuit elements within the latches are used to significantly reduce single-event upset rates in shift registers and clock paths, without resorting to TMR techniques.

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Nuclear Science, IEEE Transactions on  (Volume:57 ,  Issue: 4 )