By Topic

Wafer through-hole interconnections with high vertical wiring densities

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Christensen, Carsten ; Mikroelektronik Centret, Tech. Univ., Lyngby, Denmark ; Kersten, P. ; Henke, S. ; Bouwstra, S.

A novel wafer through-hole technique with a high vertical wiring density is introduced compatible with standard semiconductor processes. The basic idea is to realize metallic interconnection lines on the inclined sidewalls of anisotropically etched through-holes in (100) oriented silicon substrates. The key process is the application of an electrodeposited photoresist capable of covering such complex three-dimensional structures. Further, conventional deep ultraviolet light exposure enables photolithography on the inclined sidewalls with a good resolution, Interconnections have been achieved with line widths of 20 μm enabling wiring densities up to 250 cm-1

Published in:

Components, Packaging, and Manufacturing Technology, Part A, IEEE Transactions on  (Volume:19 ,  Issue: 4 )