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A temperature-insensitive gate-controlled weighted current digital-to-analog converter

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4 Author(s)
Namburu, P. ; Dept. of Electr. & Comput. Eng., Univ. of Akron, Akron, OH, USA ; Veillette, R. ; Carletta, Joan ; Ward, M.

This paper describes the design and simulation of a temperature-insensitive gate-controlled weighted current digital-to-analog converter (DAC). The DAC design includes CMOS drivers to switch the gates of a set of binary-weighted PMOS current sources. Temperature-insensitive operation is achieved by biasing the PMOS current sources at their zero temperature coefficient (ZTC) voltage. The proposed DAC has been laid out assuming a 0.5-μm silicon-on-insulator technology with approximate die dimensions of 495 μm × 135 μm. Simulations show that the DAC operates over the temperature range of 27°C-125°C with a maximum error of 0.2% in the bit currents. An alternative design with reduced die dimensions of 150 μm × 92 μm has also been implemented, but exhibits degraded performance compared to the first design.

Published in:

Circuits and Systems (MWSCAS), 2010 53rd IEEE International Midwest Symposium on

Date of Conference:

1-4 Aug. 2010