Referenced Items are not available for this document.
A new auto-lock circuit concept is presented for PLL synthesizers. This concept was applied to a 622 MHz embedded BiCMOS PLL. It guarantees that the PLL automatically locks at (622 MHz±10%) with less than 40 ps intrinsic peak-to-peak jitter irrespective of process variations and maintains this lockover 0°C to 125°C operating temperature range. This auto-lock circuit requires no external pins or expensive trimming process
Published in:
Bipolar/BiCMOS Circuits and Technology Meeting, 1996., Proceedings of the 1996
Date of Conference: 29 Sep-1 Oct 1996
- Page(s):
- 220 - 223
- Meeting Date :
- 29 Sep 1996-01 Oct 1996
- ISSN :
- 1088-9299
- Print ISBN:
- 0-7803-3516-3
- INSPEC Accession Number:
- 5484889
- Conference Location :
- Minneapolis, MN
- Digital Object Identifier :
- 10.1109/BIPOL.1996.554653
- Product Type:
- Conference Publications
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