Computer-aided design of step recovery diode frequency multipliers

Through the study of the step recovery diode (SRD) models,a method for improving the efficiency of CAD of SRD frequency multipliers is proposed. By reducing the nonlinearity of the SRD model to an appropriate extent, the simulation and optimization of SRD frequency multipliers can be carried out more easily and faster. Systematic design and optimization of an SRD frequency multiplier is described. Simulation results of this SRD frequency multiplier are compared with experimental results.