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All-Digital Frequency Synthesizer Using a Flying Adder

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5 Author(s)
Gang-Neng Sung ; Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan ; Szu-Chia Liao ; Jian-Ming Huang ; Yu-Cheng Lu
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This brief presents an all-digital frequency synthesizer based on the flying adder (FA) architecture. The FA is a fascinating architecture for frequency synthesizer designs due to its simplicity and effectiveness. The FA-based frequency synthesizer can simply use a set of multiple phase reference signals to generate a desired frequency to achieve fast frequency switching. In the proposed work, the frequency synthesizer adopts an all-digital phase-locked loop to provide a steady reference signal for the FA. The proposed frequency synthesizer is implemented in a standard 0.18-μm CMOS cell-based technology, and the core area is 0.16 mm2. The output frequency range is 39.38-226 MHz, and the peak-to-peak jitter is less than 130 ps.

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IEEE Transactions on Circuits and Systems II: Express Briefs  (Volume:57 ,  Issue: 8 )