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Cost and cycle time performance of fabs based on integrated single-wafer processing

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1 Author(s)
Wood, S.C. ; Graduate Sch. of Bus., Stanford Univ., CA, USA

Visions of future wafer fabs include the use of integrated single-wafer processors to achieve fast cycle times and contain rising production costs. A survey of IC manufacturers, equipment vendors, and IC manufacturing literature was used to generate hypothetical conventional and alternative fabs to evaluate the effect of integrated single-wafer processing on cycle time and cost performance. The distinguishing features of the alternative fab are: (1) all thermal processes performed on single-wafer processors; (2) back-end net cleans performed on single-wafer processors; (3) integration of single-wafer processors into clusters or cells wherever practical, and (4) extensive use of in situ process monitors to replace in-line process monitors. Modeling and simulation of the resulting fabs suggest that integrated single-wafer processing can reduce the cycle time of conventional fabs by about 50% without having a significant effect on wafer production test. Tool integration and single-wafer processing must be used together to achieve these performance improvements. Although traditional lot sizes appeared to be appropriate for both fabs, improvements in cluster tool reliability and process step similarity could change optimal integrated tool configurations and reduce optimal lot sizes in the future

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Semiconductor Manufacturing, IEEE Transactions on  (Volume:10 ,  Issue: 1 )