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Evaluation of the performances of a novel Punch Through Trench IGBT using a Si(1-x)Ge(x) N+ buffer layer by using finite elements simulations

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5 Author(s)
S. Azzopardi ; IMS Laboratory - University of Bordeaux, 351 cours de la Libération, 33405 Talence Cedex, France ; Y. Belmehdi ; F. Capy ; J. -Y. Deletage
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In this paper, a new Punch Through Trench IGBT using a Si(1-x)Gex N+ buffer layer is investigated by using two dimensional finite elements numerical simulations. The performances of this device are mainly obtained from the reduction of the turn-off switching time for a slight elevation of the on-state voltage. A study of the main static characteristics has been performed, particularly the relevance of the trade-off between the turn-off time and the on-state voltage, and its temperature dependency. At least, a comparison with a Carrier Storage Trench-gate Bipolar Transistor and a Trench Field Stop IGBT also including a Si(1-x)Ge(x) N+ buffer layer is done by the mean of trade off curves.

Published in:

Power Electronics Conference (IPEC), 2010 International

Date of Conference:

21-24 June 2010