Scheduled System Maintenance on May 29th, 2015:
IEEE Xplore will be upgraded between 11:00 AM and 10:00 PM EDT. During this time there may be intermittent impact on performance. For technical support, please contact us at We apologize for any inconvenience.
By Topic

A design of FPGA based hardware controller for DC-DC converter using SDRE approach

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Fujimoto, T. ; TOKYO DENKI Univ., Tokyo, Japan ; Tabuchi, F. ; Yokoyama, T.

A new control method based on State-Dependent Ricatti Equation(SDRE) control for DC-DC converter with FPGA based hardware controller is proposed. Deadbeat control is one effective digital control approach, and the robustness for the variation of the system parameter is the key issue. Some approaches were proposed, for exsample, a single-rate deadbeat control with disturbance observer, a multi-rate deadbeat control, and so on. In the SDRE approach, state conditions which include parameter variations were reflected to the feedback system. In the case of power electronics applications, a fast calculation capability of the controller is required compared with the process control and/or the robotics control. In this paper, SDRE control is designed for DC-DC converter. And SDRE control is compared with the various conventional deadbeat control in the point of view from the robustness for the variation of the system parameter. Through simulations and experiments, the proposed method is verified with FPGA based hardware controller, and compared with single-rate deadbeat control, quasi multi-rate deadbeat control and quasi multi-rate 2 degree of freedom deadbeat control.

Published in:

Power Electronics Conference (IPEC), 2010 International

Date of Conference:

21-24 June 2010