By Topic

A scalable high frequency noise model for bipolar transistors with application to optimal transistor sizing for low-noise amplifier design

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
S. P. Voinigescu ; Nortel Technol., Northern Telecom, Ottawa, Ont., Canada ; M. C. Maliepaard ; M. Schroter ; P. Schvan
more authors

Fully scalable, analytical HF noise parameter equations for bipolar transistors are presented and experimentally tested on high speed Si and SiGe technologies. A technique for extracting the complete set of transistor noise parameters from Y parameter measurements only is developed and verified. Finally, the usefulness of the noise model is demonstrated in the design of tuned LNAs in the 1.9 GHz, 2.4 GHz, and 5.8 GHz bands

Published in:

Bipolar/BiCMOS Circuits and Technology Meeting, 1996., Proceedings of the 1996

Date of Conference:

29 Sep-1 Oct 1996