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Distinguishable error detection method for Network on Chip

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4 Author(s)
Chung-Huang Jiang ; Dept. of Comput. Sci. & Inf. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Kun-Lin Tsai ; Feipei Lai ; Shun-Hung Tsai

In modern Network-on-Chip (NoC) design, how to guarantee the data correctness from source IP to destination IP becomes an important issue. Error detection can be one of the solutions of this problem. In this paper, a distinguishable error detection method and the corresponding router are proposed to solve the data correctness problem. In the proposed method, the significant or critical data will be checked strictly while the other data will be checked slightly. Simulation results demonstrate that the proposed method not only provides an effective error detection scheme but also has better power-delay product than conventional technique.

Published in:

Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on

Date of Conference:

May 30 2010-June 2 2010