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Efficient partitioning technique on multiple cores based on optimal scheduling and mapping algorithm

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8 Author(s)

In this paper, efficient hardware-software (HW-SW) partitioning technique based on high performance scheduling and mapping algorithms on multiple cores is presented. The scheduling and mapping algorithms produce the optimality of mapping tasks onto cores. The partitioning technique reduces the overall execution time and number of buses among the cores. The viability and potential of the proposed algorithms are demonstrated by extensive experimental results to conclude that the proposed algorithms are efficient scheme to obtain the optimality of scheduling, mapping and partitioning with hard and large task graph problems.

Published in:

Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on

Date of Conference:

May 30 2010-June 2 2010