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Domino ADC: A novel analog-to-digital converter architecture

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3 Author(s)
Mohammad Takhti ; Integrated Circuits and Systems Laboratory, ECE Dept., K. N. Toosi University of Technology, Tehran, Iran ; Amir M. Sodagar ; Reza Lotfi

A novel analog-to-digital converter (ADC) architecture, named domino architecture, is introduced. The proposed idea can be taken as the continuous-time counterpart of SAR ADCs, and at the same time it resembles a series version of flash ADCs being implemented with much less circuit complexity and chip area. The basic idea is then pipelined in order to speed up the conversion process, leading in a conversion rate comparable to flash ADCs. Based on the proposed idea, an 8-bit ADC was designed in a 0.18 μm CMOS technology. The converter dissipates 21 mW at 300MS/s, 19 mW of which is dissipated by the track-and-hold blocks.

Published in:

Proceedings of 2010 IEEE International Symposium on Circuits and Systems

Date of Conference:

May 30 2010-June 2 2010