A compact analog multiplier/divider circuit operating in current-mode is presented featuring low supply voltage, low area requirements and wide dynamic range. It is suited to standard digital CMOS processes and can be successfully employed in a wide range of analog signal processing applications. Measurement results for a 0.5 μm CMOS test chip prototype are presented. The circuit consumes 120 μW using a single supply voltage of 1.5 V and requires a silicon area of 150μm × 140μm.
Published in:
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Date of Conference: May 30 2010-June 2 2010