Referenced Items are not available for this document.
Speech recognition front-end implemented using a high-end floating-point processor is expensive both in terms of computer resources and cost. This paper presents a new small footprint MFCC front-end design that is suitable for low-cost speech recognition systems. By exploiting the overlapping nature of the input frames and by adopting a simple pipeline structure, the implemented design only utilizes approximately 10% total resources of a low-cost and modest-size FPGA device, thus leaving significant space for speech recognition post-processing.
Published in:
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Date of Conference: May 30 2010-June 2 2010
- Page(s):
- 2334 - 2337
- E-ISBN :
- 978-1-4244-5309-2
- Print ISBN:
- 978-1-4244-5308-5
- INSPEC Accession Number:
- 11463282
- Conference Location :
- Paris
- Digital Object Identifier :
- 10.1109/ISCAS.2010.5537242
- Product Type:
- Conference Publications
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