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Address generation of dataflow fine-grain parallel data-structures on a distributed-memory computer

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4 Author(s)
Kusakabe, S. ; Kyushu Univ., Fukuoka, Japan ; Nagai, T. ; Inenaga, K. ; Amamiya, M.

Dataflow-based fine-grain parallel data-structures provide high-level abstraction to easily write programs with potentially high parallelism. In order to show the feasibility of a fine-grain dataflow paradigm, we implement a non-strict dataflow language on off-the-shelf computers, including a distributed-memory parallel machine. The results of preliminary experiments indicate that the inefficiency related to fine-grain parallel arrays in the naive distributed-memory implementation is mainly caused by the address generation for distributed data. To reduce overhead, we introduce a two-level table addressing technique that can efficiently generate addresses. The results of performance evaluation indicate that this technique is useful to improve the performance at a practical level even on off-the-shelf computers

Published in:

Parallel Architectures and Compilation Techniques, 1996., Proceedings of the 1996 Conference on

Date of Conference:

Oct 1996