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Device integration of a 0.35 μm CMOS on shallow SIMOX technology for high-speed and low-power applications

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6 Author(s)
Adan, A.O. ; VLSI Dev. Lab., Sharp Corp., Nara, Japan ; Naka, T. ; Kaneko, S. ; Urabe, D.
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Summary form only given. SOI based devices bring the potential of very low voltage operation at high speed as required in portable electronic systems. However, to realize the advantages of SOI MOSFETs in a commercial product (1) high-performance transistors, with (2) reproducible and good controllability need to be realized. Furthermore, (3) reliability against the environment (e.g. ESD) must be demonstrated. In this work, a high performance 0.35 μm CMOS process implemented on ultra-thin (shallow) SIMOX wafers is presented. This process is aimed at low-power, low-voltage (Vdd=l to 1.8 V) and high speed application for portable communication devices. The main considerations in the process/device design and integration are discussed and manufacturability demonstrated

Published in:

SOI Conference, 1996. Proceedings., 1996 IEEE International

Date of Conference:

30 Sep-3 Oct 1996