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Wirebonding is a process often used to provide electrical connection between the silicon chip and the external leads of a semiconductor device using very fine wires. For high-power IC chips, as device size inevitably decreases, the wire diameter unfortunately must decrease due to the need of finer pitch wires. Fusing or melting of wirebonds thus increasingly becomes one of the potential failure issues for such ICs. This paper presents a finite element model that correlates very well with the observed maximum operating currents for such wirebonds under actual experimental test conditions. Aluminum, gold, and copper wires of different dimensions have been considered. The simulations have been done for transient as well as steady state, both for wires in air, and encapsulated in molding compounds.
Electronics Packaging Manufacturing, IEEE Transactions on (Volume:33 , Issue: 4 )
Date of Publication: Oct. 2010