By Topic

Automatic modeling of switch-level networks using partial orders [MOS circuits]

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
P. Agrawal ; AT&T Bell Lab., Murray Hill, NJ, USA ; S. H. Robinson ; T. G. Szymanski

It is shown how the substitution of a partial order facilitates automatic modeling in switch-level simulators that use the traditional total ordering of strengths for resolving conflicts between opposing signals while increasing the accuracy of that model. Minimization techniques are described that reduce the number of required modeling strengths to acceptable levels. As a result, the use of partially ordered strengths does not significantly degrade simulation performance. It is also shown how to rearrange the computations performed during switch-level simulation to yield a nearly twofold increase in speed for good circuit simulation. A switch-level simulator using this algorithm with partially ordered strengths has been successfully used to verify several full-custom industrial designs

Published in:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems  (Volume:9 ,  Issue: 7 )