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A 800 μA, 105 MHz CMOS crystal-oscillator digitally trimmable to 0.3 ppm

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2 Author(s)
Qiuting Huang ; Integrated Syst. Lab., Swiss Federal Inst. of Technol., Zurich, Switzerland ; Basedau, P.

A 105 MHz crystal oscillator consuming 800 μA at 1.7 V supply is described. The oscillator is part of a regulated system in a wireless device where the oscillation frequency is controlled digitally. This digital trimming of oscillation frequency is realized by binary capacitor banks of 10-bit resolution. The oscillator can be pulled from ±35 ppm to the required frequency with 0.3 ppm accuracy. The circuit has been fabricated in a 1 μm CMOS technology. The measured phase noise is -100 dBc/Hz at 100 Hz offset

Published in:

ASIC Conference and Exhibit, 1996. Proceedings., Ninth Annual IEEE International

Date of Conference:

23-27 Sep 1996